The computing industry has reached a significant milestone with the ratification of the 1.0 RISC-V Vector Specification. This development marks the beginning of a new era in computing efficiency, as ...
ClearSpeed Technology, a provider of low-power chip-based systems, has unveiled the CS301 processor, a multithreaded chip designed to improve performance and reduce power consumption for ...
A technical paper titled “Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications” was published by researchers at Barcelona Supercomputing Center ...
The maturity level of RISC-V and the availability of domain-specific instruction set extensions, like vector processing, make RISC-V a good candidate for supporting the integration of specialized ...
Intel disclosed new technical details about its next-generation Xeon Phi processor to a small group of technology analysts-journalists at one of its Hillsboro sites this week. First revealed last year ...
In this video from ISC 2019, Dr. Erich Focht from NEC Deutschland GmbH describes how the company is embracing open source frameworks for the SX-Aurora TSUBASA Vector Supercomputer. NEC recently opened ...
SiFive, a RISC-V processor design firm, unveiled two new chip designs aimed at bringing a high-performance computing solution to various industries. The announcement of the SiFive Performance P870 and ...
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