EDN

Synopsys Announces DesignWare IP for PCI Express with PCI-SIG I/O Virtualization Technology

“With the increased bandwidth demands in next-generation enterprise computing infrastructure applications, the PCI-SIG IOV technology can help reduce the cost and increase the performance of ...
WFMZ-TV

Synopsys DesignWare ARC Data Fusion IP Subsystem Incorporated by Himax in Their Artificial Intelligence WiseEye ASIC

Himax WiseEye ASIC platform is optimized for application developers deploying machine learning on battery-powered AIoT devices Synopsys DesignWare ARC Data Fusion IP Subsystem with audio software ...
Nasdaq

Synopsys and TSMC Drive Chip Innovation with Development of Broadest IP Portfolio on TSMC N4P Process

DesignWare Interface IP for the most widely used protocols delivers the required high bandwidth and low latency for efficient data connectivity in compute-intensive designs on TSMC N4P process ...
EDN

Synopsys Announces Availability of New Fully Synthesizable PowerPC Cores

MOUNTAIN VIEW, Calif., July 23 /PRNewswire-FirstCall/ — Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing ...
Reuters

Synopsys Collaborates With Samsung Foundry To Develop Designware IP For Samsung 8-nm FinFET Process

* SYNOPSYS - COLLABORATION WITH SAMSUNG FOUNDRY TO DEVELOP DESIGNWARE FOUNDATION IP FOR SAMSUNG'S 8-NANOMETER LOW POWER PLUS FINFET PROCESS TECHNOLOGY Source text for Eikon: Further company coverage: ...
Reuters

Synopsys selected to develop 45-nanometer USB PHY IP for IBM foundry process

Co announces an agreement with IBM to port the Synopsys DesignWare USB 2.0 nanoPHY IP to the 45-nanometer Common Platform process. This agreement further strengthens the collaboration between the cos ...