Siemens’ longstanding and deep engagement with the RISC-V community dates back to the foundation’s early days. Involved initially as the independent company UltraSoC, now as Siemens EDA, Siemens has ...

As the RISC-V ecosystem continues to grow, the need for robust verification and debug solutions remains increasingly important. However, the time, effort and cost of debugging and optimizing software ...

Sipeed’s new LicheeRV is a tiny computer-on-a-module featuring a 64-bit RISC-V processor, 512MB of RAM, a microSD card for storage and a USB-C port for power and/or debugging. While the tiny computer ...

SEGGER has expanded the capabilities of its debugger and performance analyzer, Ozone, by adding semihosting support for debugging RISC-V applications. This feature now enables RISC-V developers to use ...

Sipeed’s LM4A compute module is a small board with a T-Head TH1520 RISC-V processor, an NPU with up to 4 TOPS of AI performance, and support for up to 16GB of LPDDR4X memory and 128GB of eMMC storage.

Adoption of RISC-V processors is accelerating. This technology, like everything, comes with benefits and risks. The open standard means freedom for many developers, but success depends on the ...

In addition to x86 processors from AMD or Intel, the repair-friendly Framework Laptop 13 is now also available with a RISC-V CPU. The cooperation between the companies Framework and DeepComputing ...

In context: RISC-V provides an open standard instruction set architecture (ISA) derived from RISC, a potential alternative to Arm and x86 CPUs for powering new hardware devices and low-cost ...

We just got our hands on some engineering pre-samples of the ESP32-C3 chip and modules, and there’s a lot to like about this chip. The question is what should you compare this to; is it more an ESP32 ...

As RISC-V processor development matures and its usage in SoCs and microcontrollers grows, engineering teams are starting to look beyond the challenges of the processor core itself. So far, the ...