As memory bit cells of any type become smaller, bit error rates increase due to lower margins and process variation. This can be dealt with using error correction to ...

Hybrid Active-Reactive Profiling (HARP), a new error profiling algorithm that rapidly achieves full coverage of at-risk bits in memory chips that use on-die ECC ...

When running a server, especially one with mission-critical applications, it’s common practice to use error-correcting code (ECC) memory. As the name suggests, it uses an error-correcting algorithm to ...

Intelligent Memory is expanding its DRAM line with a new series of LPDDR4(X) devices with integrated ECC (error correction code) capabilities. LPDDR4 and LPDDR4X ...

The scaling of semiconductor technologies has led to a lower operating voltage in semiconductor devices, which, in turn, reduces the charge available on the capacitors for volatile memories. The ...

Memory modules with error-correcting code (ECC) protection are vulnerable to Rowhammer, an attack that can help corrupt data the computer stores in its volatile memory chips. Since its discovery in ...

About four years ago, the Rowhammer vulnerability in DRAM memory chips emerged. It came about by "hammering" -- many reads or write access -- a particular memory location causing a bit to change state ...

For the uninitiated, low-density parity-check (LDPC) code is an error correction code (ECC) that is used to both detect and correct errors on data that is transmitted ...

Figure 1. LDPC decoding latency can be minimized by using progressively stronger (and slower) forms of soft-decision (SLDPC) decoding only as needed when hard-decision (HDLPC) decoding fails. LSI ...