Semiconductor Engineering

UMI: Extending Chiplet Interconnect Standards To Deal With The Memory Wall

With the Open Compute Project (OCP) Summit upon us, it’s an appropriate time to talk about chiplet interconnect (in fact the 2024 OCP Summit has a whole day dedicated to the multi-die topic, on ...
Semiconductor Engineering

Pooling CPU Memory for LLM Inference With Lower Latency and Higher Throughput (UC Berkeley)

“The rapid growth of LLMs has revolutionized natural language processing and AI analysis, but their increasing size and memory demands present significant challenges. A common solution is to spill ...